Aehr Test Systems and ISE Labs put wafer level burn in at the center of AI chip reliability

Aehr Test Systems and ISE Labs are pushing a simple idea into a complex part of the AI supply chain: stress AI dies earlier, while they are still on the wafer, instead of waiting until after expensive packaging and HBM are attached. Their new partnership for wafer level test and burn in on high performance computing and artificial intelligence processors turns that idea into a contracted service that chipmakers and hyperscalers can buy rather than build themselves.

What Aehr and ISE Labs announced

On 3 November 2025, Aehr Test Systems announced a strategic partnership with ISE Labs to provide wafer level test and burn in services for high performance computing and AI processors.

Each side brings something specific:

  • Aehr Test Systems supplies its FOX XP and FOX XPT wafer level burn in systems and the custom WaferPak contactors that interface to AI dies on 300 millimeter wafers.
  • ISE Labs contributes engineering and production services for device qualification, correlation against existing flows and ongoing contract test operations.

The aim is to offer a turnkey path for AI chipmakers that want wafer level burn in without standing up their own equipment and teams. Instead of buying FOX systems and building a new flow in house, a customer can run an evaluation and then, if it works, have ISE Labs operate wafer level burn in on its behalf.

The announcement follows earlier Aehr milestones in 2025:

  • A paid evaluation order from a major AI processor supplier that wants to validate wafer level burn in on a high power 300 millimeter AI die.
  • Additional orders for Sonoma package level burn in systems from a large hyperscaler that is increasing production of GPUs, CPUs and AI accelerators.

Taken together, these moves show Aehr working at both ends of the screening flow: wafer level with FOX and package level with Sonoma, and now adding ISE Labs as a service partner.

Why burn in is moving earlier in the flow

Burn in is a long standing technique in semiconductors. Devices are run at elevated temperatures and voltages to trigger early life failures before shipment. Traditionally this happens at the package level: dice are assembled into packages, then the finished components go into ovens or burn in systems for hours or days under stress.

AI processors stretch that model.

  • They are very large dies on leading edge process nodes.
  • They often ship in advanced 2.5D and 3D packages with several stacks of high bandwidth memory and complex interposers.
  • The package bill of materials and assembly cost are high. A failure after burn in wastes silicon, HBM, interposers and assembly work in one hit.

That cost profile changes the economics. If you can identify marginal dies before HBM attachment and advanced packaging, you avoid scrapping expensive packages later. That is the core argument for wafer level burn in: push as much screening as possible to the point where the die is still alone on the wafer.

What wafer level burn in looks like for AI dies

Wafer level burn in is not just wafer sort with higher temperature. For AI processors it means:

  • Probing each die on a 300 millimeter wafer through a contactor that can handle fine pitch and very high current.
  • Applying elevated temperature and voltage conditions that mimic or exceed real operating stress.
  • Running functional patterns, not just DC tests, so that large parts of the AI core switch and draw current.

This is a harder problem than package level burn in for several reasons:

  • Delivering hundreds of amps to a single die at wafer level requires robust power distribution into the WaferPak and uniform thermal control across the probe area.
  • Probes must remain reliable over thousands of touchdowns. Wear, contamination and contact resistance drift become significant issues.
  • Heat must be extracted through the wafer chuck and contactor without creating temperature gradients that distort test results.

Aehr’s FOX systems and WaferPak contactors are designed specifically to address these constraints. The new partnership offers that capability as a service rather than only as equipment sales.

Aehr’s FOX XP and WaferPak hardware

The FOX family is Aehr’s multi wafer test and burn in platform. Key attributes for AI use include:

  • Multi wafer capacity FOX XP and FOX XPT can process up to 18 wafers in parallel, each with independent conditions, which is important for throughput on large AI programs.
  • High current delivery WaferPak contactors and the FOX power architecture are rated for very high currents per die, suitable for large AI processors under dynamic load.
  • Functional test during burn in The platform does not only apply static bias. It can drive activity patterns that exercise neural cores, IO and memory interfaces while the die is at burn in conditions.
  • 300 millimeter support The mechanical and thermal design is tuned for 300 millimeter wafers, which is the standard in advanced AI and HPC processes.

WaferPak contactors are custom for each die family. For the unnamed AI processor evaluation, Aehr is designing a WaferPak that matches the pad layout of that vendor’s top end AI device and can deliver the required current and signal bandwidth. The evaluation program, which Aehr expects to run three to six months, is as much a test of that contactor design as of the FOX platform itself.

ISE Labs’ contribution

ISE Labs is a semiconductor engineering and test services company. It already offers device characterisation, qualification, failure analysis and production test across a wide range of devices. In this partnership it plays three main roles:

  • Correlation ISE Labs helps correlate wafer level burn in data with existing package level screens and field failure information so that customers understand what additional coverage they are buying.
  • Production engineering The lab writes and maintains test programs, sets guardbands and monitors results at volume, which is essential when customers have limited in house test engineering capacity.
  • Operations It supplies cleanroom space, handlers, data infrastructure and staff to run long term burn in programs on behalf of AI chip vendors or hyperscalers.

Aehr and ISE Labs already have history. ISE Labs was the first to buy Aehr’s Sonoma high power package level system, and the first to purchase a FOX NP system for wafer level burn in of silicon photonics devices. The new agreement formalises that relationship around AI and HPC processors and adds a clear commercial message: wafer level burn in can be bought as a service.

Known good die for CoWoS and other advanced packages

Advanced packaging amplifies the cost of failures. Consider a typical high end AI accelerator package:

  • One or more large AI processor dies.
  • Multiple stacks of HBM, each with its own cost and yield profile.
  • An interposer or other 2.5D structure, plus power delivery and decoupling components.

If a latent defect in the AI processor die causes the package to fail during package level burn in or initial field use, the entire assembly is scrapped. The loss is no longer just the value of a single die, but the full cost of the package contents and assembly.

Wafer level burn in is a tool for improving the quality of known good die before they ever enter that packaging stage.

  • Defective dice are filtered out earlier, so HBM and interposers are allocated only to devices that have passed a more robust screen.
  • Yield learning improves, because wafer level stress data can be tied directly to process variation, layout features and other front end parameters.
  • Package level screening can focus on defects related to assembly, mechanical stress and system level behaviour rather than on die level reliability issues that should have been caught earlier.

That is the economic case Aehr highlights in its August 2025 announcement of the AI processor evaluation order. The company explicitly pitches wafer level burn in as a way to avoid packaging defective dice with high cost HBM and other expensive elements.

Interaction with package level burn in and Sonoma

Wafer level burn in does not entirely replace package level burn in. Some failure modes only appear after packaging due to mechanical stress, solder fatigue, underfill issues or differences in thermal paths. For that reason, many customers will continue to use a combination of wafer level and package level screens.

Aehr’s product line anticipates this split:

  • FOX XP and FOX XPT handle wafer level burn in and functional test for AI processors and other high power devices.
  • Sonoma systems provide package level burn in and test for completed GPUs, CPUs and AI accelerators, including those used by large hyperscalers.

The August 2025 order from a major hyperscaler for additional Sonoma systems indicates that even customers considering wafer level burn in are not abandoning package level screening. Instead, they are layering additional screening earlier in the flow for high value parts while maintaining more traditional practices at the package stage.

How hyperscalers fit into the picture

Hyperscalers are central to this story because they consume large volumes of AI accelerators and bear much of the operational risk of failures. A small percentage improvement in early life failure rates can translate into substantial savings in RMA costs, field service and lost compute time across a fleet of tens of thousands of cards.

The recent Sonoma orders for a hyperscaler show that large cloud providers are already investing in more aggressive burn in. The wafer level partnership with ISE Labs provides a route for those same customers, or for their chip suppliers, to push screening upstream without immediately committing to capital equipment.

The likely adoption pattern looks something like this:

  1. An AI chip vendor or hyperscaler engages Aehr and ISE Labs for a wafer level burn in evaluation program.
  2. Correlation is performed between wafer level failures, package level screening and field returns to quantify benefit.
  3. If the economics are positive, wafer level burn in runs in production at ISE Labs for a period of time.
  4. At higher volumes, the customer decides whether to keep using services or to invest in FOX systems for internal use.

This approach gives customers a way to test wafer level burn in in a low commitment manner while still leveraging specialised equipment and expertise.

Technical challenges and design trade offs

There are technical limits to what wafer level burn in can achieve, and these shape how Aehr and ISE Labs position the service.

  • Thermal management High power AI devices can generate significant heat even at wafer level. Ensuring uniform die temperatures and avoiding local overheating under probes is critical. Uneven thermal profiles can either hide defects or create artificial ones.
  • Contact reliability Probe tips must maintain low and stable contact resistance across many cycles. High current density at contact points can cause wear and local heating. Cleaning and maintenance routines become part of the engineering problem.
  • Test content design Effective burn in patterns need to stress the right blocks and stress them enough to trigger weak mechanisms without burning excess time or overstressing good parts. For large AI processors with many internal domains, constructing such patterns is non trivial.
  • Correlation quality Wafer level burn in only makes economic sense if it meaningfully predicts package level and field failures. That requires careful data analysis and iteration on both test content and decision thresholds.

These challenges do not prevent adoption, but they do slow it. That is one reason why the first AI processor program is structured as an evaluation with clear milestones and no guaranteed production ramp. Aehr and ISE Labs need to show that the technical approach produces useful and reliable screening data, not just that the equipment can power and heat wafers.

Market context and competitive landscape

Demand for more advanced test and burn in flows is growing across multiple segments, not just AI. Silicon carbide power devices, automotive microcontrollers and photonics all show similar patterns: more complex devices, higher expectations for field reliability and more expensive packages.

Within that broader trend, AI processors stand out due to their extreme size, power and packaging cost. That makes them strong candidates for wafer level burn in, but also demanding customers with limited tolerance for false fails or throughput bottlenecks.

Aehr’s positioning is that it is the only vendor offering an integrated combination of wafer level and package level burn in solutions specifically tuned for these high value devices. However, the company does not operate alone.

  • Alternative test equipment vendors are exploring their own wafer level and high power solutions.
  • Larger chipmakers and foundries can choose to build internal systems if they feel volumes justify custom infrastructure.
  • Some customers may decide to focus more on package level screening and field data analytics, rather than adding wafer level burn in, if their cost models and failure distributions justify that choice.

The partnership with ISE Labs is therefore both an offensive and defensive move. It gives Aehr a services channel that can capture customers who prefer opex over capex and allows Aehr to gather performance data on real AI programs, strengthening future sales arguments.

Customer adoption risk

The biggest immediate risk to Aehr and ISE Labs is adoption. The high profile AI processor evaluation is still a pre production exercise. Aehr has been explicit that there is no commitment to buy production FOX systems on the back of it, and that the decision will depend on evaluation results.

If the unnamed AI vendor concludes that wafer level burn in does not deliver enough incremental benefit over its current package level flow, or that the complexity and cost outweigh the savings in scrap and field failures, the near term revenue available to Aehr and ISE Labs from this segment will be smaller than bulls hope.

On the other hand, a positive outcome would do more than just generate one customer. A decision by a top tier AI processor supplier to adopt wafer level burn in for its high end parts would pressure competitors to examine similar strategies to avoid being at a perceived reliability disadvantage. The same is true on the hyperscaler side. If one major cloud provider insists that its suppliers run wafer level burn in, others will at least investigate the option.

Editor’s take

The Aehr Test Systems and ISE Labs partnership is a classic example of a niche technical capability turning into infrastructure as AI scales. When AI accelerators were rare and packaging was simpler, it was acceptable to dump most of the reliability screening at the package level and accept the scrap. In a world of multi billion dollar AI capex lines and advanced packages loaded with HBM, that mindset breaks down.

Wafer level burn in does not solve every reliability problem, but it addresses one obvious one: do not waste expensive packaging on dies that are likely to fail anyway. Aehr brings the hardware that makes that screening feasible at scale. ISE Labs offers a bridge for customers who want the benefits without building the flows themselves.

The next one to three years will show whether this approach becomes standard practice for AI processors or stays a specialist tool. If major AI chip suppliers and hyperscalers conclude that wafer level burn in is worth the trouble, the Aehr and ISE Labs partnership puts both companies in a good position to benefit. If they do not, it will still be an interesting case study in how AI era requirements forced the test industry to experiment with moving old ideas, like burn in, to new parts of the flow.

Sources

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